基于FPGA的18路智力竞赛电子抢答器设计

论文编号:JD857 附开题报告,任务书,外文翻译,原理图和PCB,论文字数:14230,页数:46

摘 要：根据毕业设计任务书的要求，基于FPGA的18路智力竞赛抢答器可使整个系统大大简化，运用EDA软件平台中的Max + plus II软件，设计了一款实用型智力竞赛抢答器。本设计阐述了抢答器原理及其设计思路、优化实现方法，并给出了设计方案、具体电路图及VHDL语言的各模块设计，给出了基于FPGA的VHDL源程序，通过编译和器件编程，将编程器文件以在线配置的方式下载到PCB板的主要FPGA器件——EPF10K10LC84-3器件中，经实际电路测试验证，达到了预期的设计要求。该电路不但能实现互锁和自锁，并且能用声音和数字准确提示抢答者的优先结果，大大降低了抢答器因延时造成的抢答不准确等缺点，具有反应快、功能齐全、实用性强等特点。
   
关键词：FPGA ；Max + plus II；EPF10K10LC84-3；抢答器；仿真

Design of the Eighteen Routes intellectual
 Contest Responder Based on FPGA

Abstract：According to the request of the design specification graduating，this design of eighteen routes intellectual contest responder based on FPGA can simplify the system.By using the EDA software platform of Max+plus II，we designed an intellectual contest device of experiment to answer the question preemptively based on FPGA.And presented each module and idiographic circuit diagram. Giving the VHDL source program that based on FPGA.By editing，compiling and device programming，files of device programming in circuit configurable are down loaded to the device of EPF10K10LC84_3 of PCB experimental plate. It achieved the expectant requirements of design after actual circuit testing and verifying.This circuit can not only realize to lock with each other and itself, but also use the voice，arithmetic figure to hint the result at the same time.Reduce the lack of wrong answering because of responder late.It facts quick,having much more function and good using.

Key words：FPGA ；Max + plus II；EPF10K10LC84-3；responder ；imitation

摘要 Ⅰ
目次 Ⅲ
1 引言 1
1.1 课题设计的背景 1
1.2 课题研究的意义及发展现状 2
1.3 课题研究的目标、内容和拟解决的关键问题 3
2 设计方案比较 3
2.1 数字电路设计方案 4
2.2 模拟电路设计方案 5
2.3 基于MCS-51单片机的设计方案 6
2.4 基于FPGA的设计方案 8
2.5 方案论证 10
3 基于FPGA的18路电子抢答器的工作原理 11
3.1 原理框图 11
3.2 系统电路图 12
3.3 VHDL程序设计 13
4 系统硬件设计 20
4.1 系统电路PCB图 20
4.2 EPF10K10LC84_3芯片 21
4.3 74LS245芯片 23
4.4 74LS138芯片 24
4.5 共阴极LED数码管 26
4.6 FPGA配置方案论证 27
5.结论 33
参考文献 34
致 谢 35
附 录 A 36